The course outline for Error-Control Coding is as follows:

An introduction to the theory and practice of codes for detecting and correcting errors in digital data communication and storage systems. Topics include linear block codes, cyclic codes, cyclic redundancy checksums, BCH and Reed-Solomon codes, convolutional codes, trellis-coded modulation, LDPC and turbo codes, Viterbi and sequential decoding, and encoder and decoder architecture. Applications include the design of computer memories, local-area networks, compact disc digital audio, NASA’s deepspace network, high-speed modems, communication satellites, and cellular telephony.

The course is being taught by Dr. Brian Hughes.

The course outline for Digital ASIC Design is as follows:

Modern digital design practices based on Hardware Description Languages (Verilog, VHDL) and CAD tools, particularly logic synthesis. Emphasis on design practice and the underlying algorithms. Introduction to deep submicron design issues, particularly interconnect and low power and to ASIC applications, and decision making.

The course is being taught by Dr. Paul Franzon.

I have dropped ECE 515: Digital Communications, and replaced it with ECE 767: Error-Control Coding, by using the EOL Class Schedule Revision Form. Thus, my schedule for the Spring 2008 semester is finalized as follows:

• ECE 520: Digital ASIC Design
• ECE 767: Error-Control Coding

With two heavy Engineering courses, this will be one of the most difficult semesters yet.